To make your configuration files available for Multisim, copy both files to the pldconfig directory of Multisim. In the code snippet, pin_name marks the name of the pin (which was set in the xdc file), pin_mode marks the mode in which the pin will be used (it can have the values “in”, “out”, or “bidir” ), pin_location can be “right”, or “left”, depending on which part of the sheet you want to place the pin on (they can be moved freely later) and pin_placed marks if the pin is selected by default, or not (can have the values “1”, or “0” ). The final step is to add the pins to Multisim, which can be done by adding the line below to the mspc file, for every pin. This usually can be found in the board's Reference Manual, or you can find it by plugging in the board and starting Adept. The PartNumber and Device fields contain the name of the FPGA chip. This is how the board will appear in Multisim. The Name and BoardName fields contain the name of the board. You can leave the other fields as they are. For the file to be compatible with your board, you will have to change the Name, PartNumber, BoardName, Family, Device, Package, and Ucf fields. The language is similar to HTML, and is easily readable. This file will contain the available pins in Multisim PLD design.įirst, create the header and the “body” of the file. Open the downloaded constraints file in a text editor, then create an empty file with the same base name and the *.mspc extension (replacing the ".xdc").
For more information on constraints files, read: What is a Constraints File.įor Digilent boards, you can find the xdc file specific to your board on the bottom right hand side of the board's resource center, or on this page. You can also think of this file like the name definitions for physical pins, so later, in your "code" you only have to use the name, not the pin number. The xdc file is called a constraints file (standing for Xilinx Design Constraints) and contains the location constraints assigning physical FPGA chip pins to port names in HDL code. These two are an ***.xdc** and a ***.mspc** file. Multisim needs two configuration files specific to the chosen FPGA board. While Multisim contains a few selectable FPGA boards, most of them are older and were already replaced, but newer FPGA board can be easily added. However, by using the PLD design function of Multisim Desktop Education and the compiler of the Vivado Design Suite, "schematics" of digital circuits can be translated to FPGA bit files and uploaded to the chip. While using FPGAs in certain projects might be the best choice, the fact that FPGA designs have to be written in VHDL, or Verilog, might discourage new users.
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